Freescale Semiconductor /MK65F18 /USBPHY /PWD

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Interpret as PWD

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)TXPWDFS 0 (0)TXPWDIBIAS 0 (0)TXPWDV2I 0 (0)RXPWDENV 0 (0)RXPWD1PT1 0 (0)RXPWDDIFF 0 (0)RXPWDRX

RXPWDENV=0, TXPWDFS=0, RXPWDDIFF=0, TXPWDIBIAS=0, RXPWD1PT1=0, TXPWDV2I=0, RXPWDRX=0

Description

USB PHY Power-Down Register

Fields

TXPWDFS

Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled

0 (0): Normal operation.

1 (1): Power-down the USB full-speed drivers. This turns off the current starvation sources and puts the drivers into high-impedance output

TXPWDIBIAS

Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled

0 (0): Normal operation

1 (1): Power-down the USB PHY current bias block for the transmitter. This bit should be set only when the USB is in suspend mode. This effectively powers down the entire USB transmit path

TXPWDV2I

Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled

0 (0): Normal operation.

1 (1): Power-down the USB PHY transmit V-to-I converter and the current mirror

RXPWDENV

Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled

0 (0): Normal operation.

1 (1): Power-down the USB high-speed receiver envelope detector (squelch signal)

RXPWD1PT1

Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled

0 (0): Normal operation

1 (1): Power-down the USB full-speed differential receiver.

RXPWDDIFF

Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled

0 (0): Normal operation.

1 (1): Power-down the USB high-speed differential receiver

RXPWDRX

This bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of USBPHY_CTRL is enabled

0 (0): Normal operation

1 (1): Power-down the entire USB PHY receiver block except for the full-speed differential receiver

Links

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